CS 441 System Architecture

This course covers modern computer hardware, ranging from transistor-level operations through cloud-level parallelism.

• Final exam feedback and overall course grades are on NetRun.  Thank you for a fun semester!
• The take-home final exam is due before midnight Thursday, December 18 on Blackboard (log in first).
• Project 2 final code is due before midnight Thursday, December 18 on Blackboard (log in first).
• Project 2 presentations are this week, in volunteer-first order.  Lecture notes comments are on NetRun.  Lecture notes:
• Branch Prediction
• Biological Computing
• NES Graphics & Programming Model
• NES Hardware Overview
• Memristors
• NRAM
• Project 2 rough draft comments are on NetRun.  Lecture notes are due by midnight Thursday, December 4 on Blackboard (log in first).  
• Project 2 timeline and topic suggestions.  Rough drafts are due by midnight Tuesday, December 2 on Blackboard (log in first).
• Homework 3, on network communication, is due Thursday 2014-11-13 by midnight.
• Project 1 presentations are Tuesday and Thursday 2014-10-28 & 30.  Plan on presenting 15 minutes of material, and we'll then add on questions/discussion.  Lecture notes:
• Building a 4-bit CPU from discrete chips
• Superscalar CPU in Logisim
• Probabilistic processor instruction set design
• Massively parallel blue gene hardware
• Nanowire fabrication and use
• History of out of order execution
• Kinect hardware and software
• Project 1 lecture notes are due midnight Tuesday, 2014-10-21 on Blackboard (log in first).  The idea with the lecture notes is to primarily to collect figures and provide links to your reference material, and provide a sort of reminder explanation that people can use months after the talk to remember what the talk was about. 
• Project 1 rough draft grading comments are posted on NetRun.
• Project 1 rough drafts are due midnight Tuesday, 2014-10-14 on Blackboard (log in first).
• Homework 2: determine whether superscalar is present on a non-x86 CPU of your choice, such as the ARM, SPARC, PowerPC, or MIPS machines available on NetRun.  Use a combination of research, such as manufacturer documentation, and experiments, such as timing data, to support your answer.  Turn in an approximately 1-page writeup on Blackboard (log in first) before Tuesday, October 7 at midnight.
• Project 1 topics are due in-class Thursday, 2014-09-25.  See a list of suggested topics, and (NEW!) timeline.
• Homework 1: build a simple CPU in Logisim, or another simulator of your choice. Your CPU should have more than one useable register, and execute a stored program (I used a ROM) that loads values into registers, and performs arithmetic on the registers, to store a value of 0x42 in the registers by touching nothing but the clock line.  (Save early, save often--Logisim is a good program, but it crashes!)  Turn in your .circ file on Blackboard (log in first) by midnight Thursday, 2014-09-18.
• Homework 0 was due in class Thursday, 2014-09-11.  Most popular topics in the survey are:

  Topic	Survey average
  Quantum	4.55
  High performance	4.45
  GPU	4.27
  Biological computing	4.09
  Multithreading	4.00
  Cloud computing	4.00
  Virtualization	3.64

Lecture Notes

1. 12/04

   1. Course Review and the Future of Computing Course Review and Future Prognosis

2. 12/02

   1. 3D fabrication technologies 3D Fabrication: Fin-FET, Hybrid Memory Cube, and Nanotech

3. 11/25

   1. Quantum and Adiabatic Computation Quantum Computing

4. 11/13

   1. Graphics Hardware Programming in CUDA GPU Programming in CUDA

5. 11/11

   1. Network Performance Analysis: Latency and Bandwidth Network Performance Analysis

6. 11/06

   1. Network protocols: HTTP, binary, and PUP Network Protocol Design

7. 11/04

   1. fork, mmap, and sockets for distributed memory parallel programming Distributed Memory Parallel Programming

8. 10/21

   1. Floating Point Arithmetic at the Bit Level Floating Point Circuit Implementation

9. 10/16

   1. SIMD Instructions for x86: SSE and AVX SSE & AVX: x86 SIMD

10. 10/14

    1. SIMD High Performance Programming via SIMD: Single Instruction, Multiple Data

11. 10/09

    1. Multicore performance, and an example of multicore histogramming High Performance Multicore Programming

12. 10/07

    1. Mutex locking and unlocking on multicore Multicore Locks and Deadlock

13. 10/02

    1. Cache Layout, and Multicore Cache Coherence Multicore Cache Coherence Protocols

14. 09/30

    1. Multicore via OpenMP or Pthreads Multicore: Who ordered this?

15. 09/25

    1. Superscalar execution and dependencies Superscalar: extracting parallelism at runtime

16. 09/23

    1. Pipelining, Hazards, Stalls, and Operand Forwarding Pipelining

17. 09/18

    1. Software for parallel hardware: encoding parallelism Encoding: RISC, CISC, VLSI, FPGA

18. 09/16

    1. Embedded Systems: instruction sets for tiny computers Embedded Systems

19. 09/11

    1. CPU and instruction set design basics Simple CPU Design

20. 09/09

    1. Triumph of the MOSFET Semiconductors and FETs

21. 09/04

    1. Power limitations, and circuit basics Power: Volts, Amps, Watts

Index of 2014 Fall

• Syllabus
• hw
  • CS 441 hw0

Orion Lawlor

• Associate Professor, Computer Science
• University of Illinois, Urbana-Champaign 2004 Ph.D.
• Computer graphics; parallel programming; robotics; 3D printing.
• Duckering 529
• 907-474-7678

Office Hours:

• By Appointment

• lawlor@alaska.edu